Hardware Support for Trustworthy Computing

Privacy and integrity are important security concerns. These concerns are addressed by controlling information flow, i.e., restricting how information can flow through a system. Most proposed systems that restrict information flow make the implicit assumption that the hardware used by the system is fully "correct" and that the hardware's instruction set accurately describes its behavior in all circumstances. The truth is more complicated: modern hardware designs defy complete verification; many aspects of the timing and ordering of events are left totally unspecified; and implementation bugs present themselves with surprising frequency

Our work builds on over a decade of experience in information flow tracking and analysis. We have designed intrusion-resistant architectures, architectures with provable information separation properties, as well as a hardware-description language and compiler. Our most recent work will explore the interaction between error-resilience and security, leveraging information flow analysis to more efficiently enforce resilience and security properties.

Faculty

  • Fred Chong
  • Yanjing Li

    • Publications

  • Zhaoxia Deng, Ariel Feldman, Stuart A. Kurtz, and Frederic T. Chong. Lemonade from Lemons: Harnessing Device Wearout to Create Limited-Use Security Architectures, In the proceedings of the 44rd Annual Intl. Symposium on Computer Architecture (ISCA) , June 2017. Toronto, Canada.

  • Xun Li, Vineeth Kashyap, Jason Oberg, Mohit Tiwari, Vasanth Ram Rajarathinam, Ryan Kastner, Timothy Sherwood, Ben Hardekopf, and Frederic T. Chong. Sapper: A Language for Hardware-Level Security Policy Enforcement , Proceedings of the 19th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2014. Salt Lake City, UT.

  • Hassan Wassel, Ying Gao, Jason Oberg, Ted Huffmire, Ryan Kastner, Frederic T. Chong, and Timothy Sherwood. SurfNoC: A Low Latency and Provably Non-Interfering approach to Secure Networks-On-Chip , In the proceedings of the 40th Annual Intl. Symposium on Computer Architecture (ISCA) , June 2013. Tel Aviv, Israel. An IEEE Micro Top Pick

  • Mohit Tiwari, Jason K. Oberg, Xun Li, Jonathan Valamehr, Timothy Levin, Ben Hardekopf, Ryan Kastner, Frederic T. Chong, and Timothy Sherwood. Crafting a Usable Microkernel, Processor, and I/O System with Strict and Provable Information-Flow Security , In the proceedings of the 38th Annual Intl. Symposium on Computer Architecture (ISCA) , June 2011. San Jose, CA.

  • Xun Li, Mohit Tiwari, Jason K. Oberg, Vineeth Kashyap, Frederic T. Chong, Timothy Sherwood, and Ben Hardekopf. Caisson: A Hardware Description Language for Secure Information Flow , 32nd ACM SIGPLAN conference on Programming Language Design and Implementation (PLDI), June 2011. San Jose, CA.

  • Mohit Tiwari, Xun Li, Hassan M G Wassel, Frederic T Chong, and Timothy Sherwood. Execution Leases: A Hardware-Supported Mechanism for Enforcing Strong Non-Interference, Proceedings of the International Symposium on Microarchitecture (Micro), December 2009. New York, NY

  • Mohit Tiwari, Hassan Wassel, Bita Mazloom, Shashidhar Mysore, Frederic Chong, and Timothy Sherwood. Complete Information Flow Tracking from the Gates Up Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2009. Washington, DC An IEEE Micro Top Pick

  • Haibo Chen, Xi Wu, Liwei Yuan, Binyu Zang, Pen-chung Yew, Frederic T. Chong. From Speculation to Security: Practical and Efficient Information Flow Tracking Using Speculative Hardware. International Symposium on Computer Architecture. Beijing, China. June 2008.

  • Jedidiah R. Crandall, Zhendong Su, S. Felix Wu, and Frederic T. Chong. On Deriving Unknown Vulnerabilities from Zero-Day Polymorphic and Metamorphic Worm Exploits. 12th ACM Conference on Computer and Communications Security. Alexandria, Virginia. November 2005.

  • Jedidiah R. Crandall and Frederic T. Chong. Minos: Control Data Attack Prevention Orthogonal to Memory Model. International Symposium on Microarchitecture. Portland, Oregon. November 2004