Saeid Barati - Picture

Saeid Barati

Ph.D. Student

Computer Science Department

The University of Chicago

Personal Profile

I am Saeid Barati, third year Ph.D. student at the Department of Computer Science at University of Chicago. Currently, I am working as research assistant of Prof. Hank Hoffmann. Prior to graduate studies, I received my B.Sc. in Computer Engineering from Sharif University of Technology.

My research focuses on inexact computing systems, self-adaptive energy efficient systems and multicore processor architecture. I am interested in designing optimization tools with adaptive feedback loops in accuracy vs. energy vs. performance trade-off space.

Research Interest

Research Power/Energy Efficient Systems

Self-adaptive Computing Systems

Computer Architecture

Parallel and High Performance Computing


Providing Fairness in Heterogeneous Multicores with a Predictive, Adaptive Scheduler

IPDPS-HCW - May’16.

S. Barati, H. Hoffmann.

Yield-Driven Design-Time Task Scheduling Techniques for MPSoCs under Process Variation: A Comparative Study

IET Computers and Digital Techniques journal - Dec’14.

M. Momtazpour, O. Assare, A. Boroumand, N. Rahmati, S. Barati, M. Goudarzi.

Research Experience

Adaptive Computing Research Group

Member since Sep 2013

Research Assistant, Under supervision of Prof. H. Hoffmann

DSN (Data Storage Systems and Networks) Laboratory

Member 2010-2013

Undergraduate Research Assistant, Under supervision of Prof. H. Asadi

Teaching Experience

Teacher assistant at University of Chicago:

Introduction to Computer Systems (CMSC154) - Prof. H. Hoffmann - Spring 2015

Concepts of Programming (MPCS 50101) - J. Cohen - Winter 2015

Computer Architecture (CMSC222) - Prof. A. Chien - Fall 2014

Operating Systems (MPCS52030) - Dr. A. Nicholson - Spring 2014

Networks (MPCS54001) - Dr. A. Nicholson - Winter 2014

Introduction to Computer Science (CMSC121) - Prof. A. Rogers - Fall 2013

Teacher assistant at Sharif University of Technology:

Signals and Systems - Prof. M.T. Manzuri - Spring 2012

Digital Electronics Lab - Prof. A. Hemmatyar - Spring 2012

Scientific and Technical Presentation - Prof. S. Kasaei - Spring 2011-12

Digital Electronics - Prof. M.T. Manzuri - Spring 2011-12

Signals and Systems - Dr. H. Veisi - Fall 2011

Introduction to programming - Dr. S. Dorri - Spring 2012


UChicago Seal

The University of Chicago - Chicago, IL

2013 - Present

Pursuing Ph.D. in Computer Science - Systems

M.S. Computer Science, Nov 2015

Thesis: "Providing Fairness in Heterogeneous Multicores with a Predictive, Adaptive Scheduler" [pdf]

Sharif Seal

Sharif University of Technology - Tehran, Iran

2008 - 2013

B.Sc. in Computer Engineering - Hardware

Thesis: "Regional Wear leveling: An Improved WearLeveling Method in SSDs"

Nodet Seal

Shahid Beheshti High School - Shahr e kord, Iran

2004 - 2008

National Organization for Development of Exceptional Talents
Diploma in Physics and Mathematics Discipline


Current Research: Inexact Computing,

This text is bold Current Project: Comparing Approximate Computing Frameworks

Approximate methods trade in accuracy for power and performance. These methods can be significantly more efficient in the energy they consume, their speed of execution, and their area needs, which makes them attractive in application contexts that are resilient to errors.

Providing Fairness in Heterogeneous Multicores with a Predictive, Adaptive Scheduler

Shared resources contention multicore systems results in reducing both fairness and overall system performance. Contention-aware schedulers have been proposed to provide fairness and predictable behavior through resource management. Covering deficits of prior schedulers such as significant performance overhead or inability to support heterogeneous systems raised the need for a predictive adaptive scheduler. Our scheduler outperforms state-of-the-art contention-aware scheduler by 24% and 9% improvement in fairness and performance respectively.

Simception: Fast Flexible multicore simulator

Simception can be used to design and experiment different contention-aware scheduling policies. We verify Simception with performance output of TilePro64 manycore system. It trades in simulation accuracy for faster execution time in order to reduce algorithm development overhead.

Evaluation of cache hierarchy on power and hit/miss ratio

In this work, we tried to see how much size and associativity of Last Level Cache will change power consumption and performance(by measuring hit/miss ratio), using MARSS and McPat simulators. Graduate Computer Architecture Course.

Regional Wearleveling: An Improved WearLeveling Method in SSDs

B.Sc. Thesis: Due to limited lifetime of each memory cell in an SSD, erase cycles must be spread across chip. Regional wearleveling does not save history of erasures, but dynamically change logical address of blocks and boundaries of address translation table. Thus Regional wearleveling improved life endurance with negligible performance overhead over previous work.

Process variation of Multiprocessor System-on-Chip (MPSoC)

In this project, we achieve significant speedup over conventional algorithms by proposing a heuristic static task Scheduling algorithm for MPSoC performance and energy optimization under Process Variation.

Victim Cache in SimpleScalar

Implementing a cache that stores garbage blocks for future use, written in C.

Sign Bit Reduction Multiplier

Final project of HDL course, written in VHDL. Mor info at ieeexplore .

Regular Expression Parser on CELL/BE Processor

A Regular Expression Parser implemented in C on CELL/BE Processor in order to fully utilize CELL BE's SIMD features to improve performance. Microprocessor course.

Design and implement a minimalistic standard cell library

By using Cadence tools, we tried to re-design and implement updated version of 45nm cell library. VLSI course.



Office of International Affairs at University of Chicago

Mentor 2015-2017

Mentor at International Mentor Program for Academic and Cultural Transition (IMPACT), helping incoming international Ph.D. students for positive relationship with the University community.

Students' Scientific Chapter

President 2011-2012, Member 2010-2013

SSC is the student committee concerned with directing the department extra-curriculum activities. As a president, I have directed some activities such as programming contests, computer engineering related workshops and talks.

ACM International Collegiate Programming Contest

Judge , US MidCentral Region, Chicago, 2014

Judge , US MidCentral Region, Chicago, 2013

Chief of Staff , Middle East Region, Tehran, 2012

Technical Manager , Middle East Region, Tehran, 2010-11

Technical Staff , Middle East Region, Tehran, 2009

Key Skills

  • C/C++
  • Python
  • Java
  • VHDL
  • Verilog
  • Assembly (x86/68K)
  • Altera Quartus
  • Xilinx ISE
  • ModelSim
  • SimpleScalar
  • MARSSx86
  • Design Compiler
  • MySQL
  • Linux
  • Windows
  • and ...


Last update: Nov 2014, designed by Saeid Barati based on idea from T. Hardy.